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load-exclusive/store-exclusive (LL/SC)
An ARM pair of instructions used to update shared memory safely, by detecting if anyone else touched it in between.
To change a shared value atomically, ARM chips use load-exclusive to read it while tagging the location, then store-exclusive to write back — but the store only succeeds if nothing else modified that location in the meantime, otherwise you retry. This is a different strategy from x86's single compare-and-swap (CMPXCHG) instruction for the same goal. Both are foundations for locks and lock-free data structures.
See also
- ISAThe full set of instructions a particular kind of CPU understands — its native vocabulary.
- interrupt / IRQA hardware signal that yanks the CPU away from what it's doing to handle something urgent, like a keypress or timer.